Azuro sells software tools used to build the clock networks on digital semiconductor chips. The company's unique technology makes chips faster, reduces chip power and dramatically accelerates chip time to market.
Rubix™
Low power useful skew CTS
across multiple modes and corners
- » Increase clock frequency
- » Reduce leakage power
- » Reduce IR drop
- » Accelerate timing closure
more
PowerCentric™
Low power skew balanced CTS
across multiple modes and corners
- » Reduce dynamic power
- » Reduce hold fix area
- » Reduce clock latency and skew
- » Balance complex clocks right first time
more
Jun 16, 2010 ▪ EE Times
Azuro enhances clock tree synthesis toolJun 14, 2010
Azuro Strengthens Leadership in Timing OptimizationMar 3, 2010
Azuro Joins Cadence Connections ProgramAtheros
"Azuro's PowerCentric™ truly is a fresh approach to CTS, and enables us to deliver silicon to market faster and with even lower power consumption than before."
Methodology Architect for Atheros
Broadcom
"...Azuro provided Broadcom with design automation tools that assisted in reducing the active power consumption of our BCM2702 mobile multimedia processor."
Sr Director Engineering, Broadcom
CSR
"...Low power is a key driver for CSR. PowerCentric™ fits seamlessly into our design flow and has enabled us to achieve significant reductions in the digital power consumption of our chips."
Co-founder and CTO, CSR
Ikanos
"Our customers' power requirements push the limits of cooling and power supply, so reducing power consumption is a critical issue for these applications. We adopted PowerCentric™ in order to maintain our leadership in delivering low power solutions to our customers."
Vice President of Product Development, Ikanos
NVIDIA
"Clock concurrent optimization makes sense. Rubix™ plugged easily into our flow, and improved key chip speed metrics (WNS and TNS) out of the box on some of our toughest blocks with no impact on area. We view clock concurrent optimization as a key evolutionary step in backend physical design."
Director of Engineering at NVIDIA
NVIDIA
"PowerCentric™ gives us the ability to implement superior clock trees inside our existing physical framework of EDA tools."
Director of Engineering at NVIDIA
ST
"Azuro reduced the insertion delay of our critical clocks by 15% which allowed us to meet our performance targets. PowerCentric™'s superior results and unique graphical analysis capabilities also allowed us to quickly identify bottlenecks and accelerate our clock implementation process."
Director of CAD & Design Methodology for the HED group at STMicroelectronics
Toshiba
"In our evaluation, PowerCentric™ delivered 15 to 25 percent reduction in power consumption compared to our existing implementation with minimum impact on design size or performance..."
Vice President Design Solutions at TAEC
TSMC
"With Rubix™, Azuro continues its track record of strong technology innovation to help close the design productivity gap. Rubix increases clock frequency and reduces leakage power on our hardened CPU cores. And it does this without any change in sign-off methodology."
Senior Director of Design Infrastructure Marketing for TSMC
TSMC
"Azuro's PowerCentric™ tool delivers significant power savings, and improves clock timing by reducing clock skew and insertion delay."
Senior Director of Design Infrastructure Marketing for TSMC
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