About Azuro

Azuro is an electronic design automation (EDA) software company selling software tools to design digital semiconductor chips. The company's unique technology makes chips faster, reduces chip power and dramatically accelerates chip time to market. The company was founded in 2002, and has completed over 100 tapeouts since launching its first product in 2005. Azuro is headquartered in Santa Clara, CA with R&D in Cambridge, UK, and is privately held.

Products and Technology

At the heart of all modern digital semiconductor chips lies the clock, a special network of signals that co-ordinates all operations on a chip by controlling when logic function results are stored into data registers. Traditional chip design tools separate the building of clock networks from the optimization of logic function delays by assuming that clock networks are "balanced", meaning that clock signals arrive at registers at the same time. Clock balancing is performed by "clock tree synthesis" tools and logic optimization is performed by "timing optimization" tools.

Azuro sells two software tools, PowerCentric™ and Rubix™. PowerCentric is a clock tree synthesis tool that uses an advanced global approach to clock skew balancing to intelligently determine the most efficient places in a clock network to insert delay so that the network is balanced. This differs from traditional clock tree synthesis tools that use inefficient bottom-up or top-down recursive subdivision methods to insert delay into clock networks. Chips built using PowerCentric consume up to 20% less power, and have up to 30% less total delay from clock source to register.

Rubix is a revolutionary new "clock concurrent optimization" tool that uniquely combines timing optimization with useful skew based clock tree synthesis. Useful skew based clock tree synthesis relaxes the traditional requirement that clocks be balanced and therefore that all logic functions on a chip be given the same amount of time to compute a result - in essence taking the design paradigm from an 8 hour day to a 40 hour week. By combing useful skew based clock tree synthesis with traditional timing optimization Rubix is able to exploit the extra freedom provided by useful skew and increase chip speed by up to 25%, decrease chip leakage power by up to 30%, or accelerate chip time to market by 2 months.